74ACT157| Datasheet

74ACT157, 74ACT157MTR

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74ACT157
QUAD 2 CHANNEL MULTIPLEXER
s s

HIGH SPEED: tPD = 5.5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4uA(MAX.) at TA=25 C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.), V IL = 0.8V (MAX.) 50 TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 157 IMPROVED LATCH-UP IMMUNITY

DIP

SOP

TSSOP

ORDER CODES
PACKAGE DIP SOP TSSOP TUBE 74ACT157B 74ACT157M T&R 74ACT157MTR 74ACT157TTR

DESCRIPTION The 74ACT157 is an advanced high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. It consists of four 2-input digital multiplexer with common SELECT and STROBE inputs. It is a non-inverting multiplexer. When the STROBE input is held high selection of data is inhibit and all

the outputs become low. The SELECT decoding determines whether the A or B inputs get routed to their corresponding Y outputs. The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

April 2001

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