74ACT32| Datasheet

74ACT32, 74ACT32MTR, 74ACT32TTR

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74ACT32
QUAD 2-INPUT OR GATE
s s

HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2uA(MAX.) at TA=25 C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.), V IL = 0.8V (MAX.) 50 TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 32 IMPROVED LATCH-UP IMMUNITY

DIP

SOP

TSSOP

ORDER CODES
PACKAGE DIP SOP TSSOP TUBE 74ACT32B 74ACT32M T&R 74ACT32MTR 74ACT32TTR

DESCRIPTION The 74ACT32 is an advanced high-speed CMOS QUAD 2-INPUT OR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 2 stages including buffer output, which enables high noise immunity and stable output.

The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

April 2001

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