74LVQ240| Datasheet

74LVQ240, 74LVQ240MTR, 74LVQ240TTR

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74LVQ240
LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED)
s

s s

HIGH SPEED: tPD = 6 ns (TYP.) at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 uA (MAX.) at TA=25 C LOW NOISE: VOLP = 0.4V (TYP.) at VCC = 3.3V 75 TRANSMISSION LINE OUTPUT DRIVE CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0 V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 240 IMPROVED LATCH-UP IMMUNITY

SOP

TSSOP

Table 1: Order Codes
PACKAGE SOP TSSOP T&R 74LVQ240MTR 74LVQ240TTR

DESCRIPTION The 74LVQ240 is a low voltage CMOS OCTAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS

technology. It is ideal for low power and low noise 3.3V applications. G output control governs four BUS BUFFERs. This device is designed to be used with 3 state memory address drivers, etc. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

Figure 1: Pin Connection And IEC Logic Symbols

July 2004

Rev. 7

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