74LVQ241| Datasheet

74LVQ241, 74LVQ241TTR

Datasheet preview, take a look at Datasheets before downloading (Data Sheet is available on manufacturer site)


74LVQ241
LOW VOLTAGE OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)
s

s s

s

s

s

s s

s

s

s

HIGH SPEED: tPD = 5.5 ns (TYP.) at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 uA (MAX.) at TA=25 C LOW NOISE: VOLP = 0.4V (TYP.) at VCC = 3.3V 75 TRANSMISSION LINE OUTPUT DRIVE CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0 V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 241 IMPROVED LATCH-UP IMMUNITY

SOP

TSSOP

Table 1: Order Codes
PACKAGE SOP TSSOP T&R 74LVQ241MTR 74LVQ241TTR

DESCRIPTION The 74LVQ241 is a low voltage CMOS OCTAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS

technology. It is ideal for low power and low noise 3.3V applications. 1G and 2G output control governs four BUS BUFFERs. This device is designed to be used with 3 state memory address drivers, etc. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

Figure 1: Pin Connection And IEC Logic Symbols

August 2004

Rev. 7

1/12


74LVQ241 Datasheet st Download PDF

Add this permalink to your bookmarks for future download of 74LVQ241 datasheet

Permalink: http://datasheet.emcelettronica.com/st/74LVQ241

-->