74LVQ4066| Datasheet

74LVQ4066, 74LVQ4066MTR, 74LVQ4066TTR

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74LVQ4066
QUAD BILATERAL SWITCH
s

HIGH SPEED: tPD = 0.4 ns (TYP.) at VCC = 3.3 V tPD = 0.1 ns (TYP.) at VCC = 5 V LOW POWER DISSIPATION: ICC = 2uA (MAX.) at TA=25 C LOW "ON " LOW RESISTANCE RON = 14 at VCC = 3.3V, II/O < 1 mA RON = 12 at VCC = 5.0V, II/O < 1 mA SINE WAVE DISTORTION: 0.04% at VCC = 3.3V, f = 1KHz OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4066 IMPROVED LATCH-UP IMMUNITY

SOP

TSSOP

Table 1: Order Codes
PACKAGE SOP TSSOP T&R 74LVQ4066MTR 74LVQ4066TTR

DESCRIPTION The 74LVQ4066 is a low voltage CMOS QUAD BILATERAL SWITCH fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications and each switch is designed to handle both analog and digital signals. The switches permit signals with amplitudes up to VCC (peak) to be transmitted in either direction

without relevant propagation delay and without generating additional ground bounce noise. It has an ON-Resistance which is greatly reduced in comparison with 74HC4066. It is provided of four individual enable inputs to control the switches; the switch is ON when the C input is held high and OFF (High Impedance) when C is held low. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage.

Figure 1: Pin Connection And IEC Logic Symbols

July 2004

Rev. 8

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