74LVTH16244| Datasheet

74LVTH16244, 74LVTH16244LB, 74LVTH16244LBR, 74LVTH16244TTR

Datasheet preview, take a look at Datasheets before downloading (Data Sheet is available on manufacturer site)

74LVTH16244
LOW VOLTAGE BICMOS 16 BIT BUS BUFFER WITH BUS HOLD AND POWER UP 3-STATE
s

s s

HIGH SPEED: tPD = 3.2ns (MAX.) at TA = 85 C VCC = 3.0V LOW POWER DISSIPATION HIGH LEVEL OUTPUT: ICC = 190uA (MAX.) at TA = 85 C OUTPUT IMPEDANCE: |IOH| = 32mA, IOL = 64mA (MIN at VCC = 3.0V) |IOH| = 8mA, IOL = 24mA (MIN at VCC = 2.7V) BALANCED PROPAGATION DELAYS: tPLH tPHL POWER DOWN PROTECTION ON INPUTS AND OUTPUTS COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN),VIL = 0.8V(MAX) at VCC = 2.7 to 3.6V POWER-UP/DOWN 3-STATE: IOZPU = 100uA MAX at VCC = 0V to 1.5V, VCC = 1.5V to 0V, TA = 85 C BUS HOLD PROVIDED ON DATA INPUTS OPERATING VOLTAGE RANGE: VCC(OPR) = 2.7V to 3.6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES H16244 LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17)

TSSOP

TFBGA

ORDER CODES
PACKAGE TSSOP48 TFBGA54 T&R 74LVTH16244TTR 74LVTH16244LBR

LOGIC DIAGRAM

DESCRIPTION The 74LVTH16244 is a low voltage BiCMOS 16 BIT BUS BUFFER (NON-INVERTED) fabricated with sub-micron silicon gate and five-layer metal wiring BiCMOS technology. It is ideal and full specified for hot-insertion and high speed 3.3V applications; the power-up/down 3-state circuitry places the outputs in the high impedance state during power-up/down, which prevents driver conflict. This function is guaranteed when VCC is between 0 and 1.5V. It can be interfaced to 3.3V signal environment for both inputs and outputs. Any nG output control governs four BUS BUFFERS. Output Enable input (nG) tied together gives full 16-bit operation. When nG is LOW, the outputs are on. When nG is HIGH, the output are in high impedance state effectively isolated. Bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistors. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage.
February 2004 1/13