74LVX244| Datasheet

74LVX244, 74LVX244MTR, 74LVX244TTR

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74LVX244
LOW VOLTAGE CMOS OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED)
s

s s s

HIGH SPEED: tPD=4.5ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V LOW POWER DISSIPATION: ICC = 4 uA (MAX.) at TA=25 C LOW NOISE: VOLP = 0.5V (TYP.) at VCC =3.3V SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 mA (MIN) at VCC =3V BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 244 IMPROVED LATCH-UP IMMUNITY

SOP

TSSOP

Table 1: Order Codes
PACKAGE SOP TSSOP T&R 74LVX244MTR 74LVX244TTR

DESCRIPTION The 74LVX244 is a low voltage CMOS OCTAL BUS BUFFER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications.

G output enable governs four BUS BUFFERs Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. It combines high speed performance with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

Figure 1: Pin Connection And IEC Logic Symbols

August 2004

Rev. 4

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