74V1G02| Datasheet

74V1G02, 74V1G02CTR, 74V1G02STR

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74V1G02
SINGLE 2-INPUT NOR GATE
s s

s s

HIGH SPEED: tPD = 3.6ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1uA(MAX.) at TA=25 C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY

SOT23-5L

SOT323-5L

ORDER CODES
PACKAGE SOT23-5L SOT323-5L T&R 74V1G02STR 74V1G02CTR

DESCRIPTION The 74V1G02 is an advanced high-speed CMOS SINGLE 2-INPUT NOR GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.

Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

PIN CONNECTION AND IEC LOGIC SYMBOLS

April 2004

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