74VCXH16245, 74VCXH16245TTR
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74VCXH16245
LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS
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3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED: tPD = 2.5 ns (MAX.) at VCC = 3.0 to 3.6V tPD = 3.2 ns (MAX.) at VCC = 2.3 to 2.7V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3.0V |IOH| = IOL = 18mA (MIN) at VCC = 2.3V OPERATING VOLTAGE RANGE: VCC(OPR) = 1.8V to 3.6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES H16245 BUS HOLD PROVIDED ON BOTH SIDES LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17) ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V
TSSOP
ORDER CODES
PACKAGE TSSOP TUBE T&R 74VCXH16245TTR
PIN CONNECTION
DESCRIPTION The 74VCXH16245 is a low voltage CMOS 16 BIT BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 2.3 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs. This IC is intended for two-way asynchronous communication between data buses; the direction of data transmission is determined by DIR input. The two enable inputs nG can be used to disable the device so that the buses are effectively isolated. Bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistor. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW.
July 2003
1/11
74VCXH16245 Datasheet st Download PDF
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