74VCXH32245| Datasheet

74VCXH32245, 74VCXH32245LBR

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74VCXH32245
LOW VOLTAGE CMOS 32-BIT BUS TRANSCEIVER (3-STATE) WITH 3.6V TOLERANTAT INPUTS AND OUTPUTS
PRELIMINARY DATA
s s

s s

3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED: tPD = 2.5ns (MAX.) at VCC = 3.0 to 3.6V tPD = 3.0ns (MAX.) at VCC = 2.3 to 2.7V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V |IOH| = IOL = 18mA (MIN) at VCC = 2.3V OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 3.6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 32245 BUS HOLD PROVIDED ON BOTH SIDE LATCH-UP PERFORMANCE EXCEEDS 300mA ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V

LFBGA96 (Top and Bottom view)

ORDER CODES
PACKAGE LFBGA96 TRAY 74VCXH32245LB T&R 74VCXH32245LBR

DESCRIPTION The 74VCXH32245 is a low voltage CMOS QUAD 32-BIT BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 V applications; it can be interfaced to 3.6V signal enviroment for both inputs and outputs. LOGIC DIAGRAM

This IC is intended for two-way asynchronous communication between data buses: the direction of data trasmission is determined by DIR input. Any nG contol output governs four BUS TRANSCEIVER. Output Enable input (nG) tied together gives full 32-bit operation. When nG is LOW, the output are on. When nG is HIGH, the output are in high impedance state so that the buses are effectively isolated. Bus hold on data inputs is provided in order to eliminate the need for external pull-up or pull-down resistor. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

December 2001

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This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.