74VHC16240| Datasheet

74VHC16240, 74VHC16240TTR

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74VHC16240
16-BIT BUS BUFFER WITH 3-STATE OUTPUTS (INVERTED)
s s

s s

HIGH SPEED: tPD = 5.3 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 uA (MAX.) at TA=25 C HIGH NOISE IMMUNITY VNIH=VNIL= 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.9V (MAX.)

TSSOP

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PACKAGE TSSOP TUBE T&R 74VHC16240TTR

PIN CONNECTION

DESCRIPTION The 74VHC16240 is an advanced high-speed CMOS 16-BIT BUS BUFFER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Any nG output control governs four BUS BUFFERS. Output Enable inputs (nG) tied together give full 16 bit operation. When nG is LOW, the outputs are on. When nG is HIGH, the output are in high impedance state. This device is designed to be used with 3 state memory address drivers, etc. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

February 2003

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