74VHCT257A| Datasheet

74VHCT257A, 74VHCT257AMTR, 74VHCT257ATTR

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74VHCT257A
QUAD 2 CHANNEL MULTIPLEXER (3-STATE)
s s

s s

HIGH SPEED: tPD = 4.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 uA (MAX.) at TA=25 C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 257 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (MAX.)

SOP

TSSOP

Table 1: Order Codes
PACKAGE SOP TSSOP T&R 74VHCT257AMTR 74VHCT257ATTR

DESCRIPTION The 74VHCT257A is an advanced high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is composed of four independent 2-channel multiplexers with common SELECT and ENABLE INPUT(OE). The VHCT257A is a non-inverting multiplexer. When the ENABLE INPUT is held "High", all outputs become high impedance state. Figure 1: Pin Connection And IEC Logic Symbols

If SELECT INPUT is held "Low", "A" data is selected, when SELECT INPUT is "High", "B" data is chosen. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V since all inputs are equipped with TTL threshold. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

December 2004

Rev. 3

1/13