E-ST10F280, E-ST10F280-Q3TR, ST10F280, ST10F280-Q3TR

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ST10F280
16-BIT MCU WITH MAC UNIT, 512K BYTE FLASH MEMORY AND 18K BYTE RAM
PRODUCT PREVIEW

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GPT2

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HIGH PERFORMANCE CPU WITH DSP FUNCTIONS - 16-BIT CPU WITH 4-STAGE PIPELINE. - 50ns INSTRUCTION CYCLE TIME AT 40MHz CPU CLOCK. - MULTIPLY/ACCUMULATE UNIT (MAC) 16 X 16-BIT MULTIPLICATION, 40-BIT ACCUMULATOR - REPEAT UNIT. - ENHANCED BOOLEAN BIT MANIPULATION FACILITIES. - ADDITIONAL INSTRUCTIONS TO SUPPORT HLL AND OPERATING SYSTEMS. - SINGLE-CYCLE CONTEXT SWITCHING SUPPORT. MEMORY ORGANIZATION - 512K BYTE ON-CHIP FLASH MEMORY SINGLE VOLTAGE WITH ERASE/PROGRAM CONTROLLER. - 100K ERASING/PROGRAMMING CYCLES. - 20 YEAR DATA RETENTION TIME - UP TO 16M BYTE LINEAR ADDRESS SPACE FOR CODE AND DATA (5M BYTE WITH CAN). - 2K BYTE ON-CHIP INTERNAL RAM (IRAM). - 16K BYTE EXTENSION RAM (XRAM). FAST AND FLEXIBLE BUS - PROGRAMMABLE EXTERNAL BUS CHARACTERISTICS FOR DIFFERENT ADDRESS RANGES. - 8-BIT OR 16-BIT EXTERNAL DATA BUS. - MULTIPLEXED OR DEMULTIPLEXED EXTERNAL ADDRESS/DATA BUSES. - FIVE PROGRAMMABLE CHIP-SELECT SIGNALS. - HOLD-ACKNOWLEDGE BUS ARBITRATION SUPPORT. INTERRUPT - 8-CHANNEL PERIPHERAL EVENT CONTROLLER FOR SING
LE CYCLE, INTERRUPT DRIVEN DATA TRANSFER. - 16-PRIORITY-LEVEL INTERRUPT SYSTEM WITH 56 SOURCES, SAMPLE-RATE DOWN TO 25ns. TWO MULTI-FUNCTIONAL GENERAL PURPOSE TIMER UNITS WITH 5 TIMERS. TWO 16-CHANNEL CAPTURE/COMPARE UNITS A/D CONVERTER - 2X16-CHANNEL 10-BIT. - 4.85uS CONVERSION TIME - ONE TIMER FOR ADC CHANNEL INJECTION 8-CHANNEL PWM UNIT SERIAL CHANNELS - SYNCHRONOUS/ASYNC SERIAL CHANNEL - HIGH-SPEED SYNCHRONOUS CHANNEL. FAIL-SAFE PROTECTION - PROGRAMMABLE WATCHDOG TIMER. - OSCILLATOR WATCHDOG.

PBGA208 (23 x 23 x 1.96 - Pitch 1.27 mm) (Plastic Bold Grid Array) ORDER CODE: ST10F280-JT3

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TWO CAN 2.0b INTERFACES OPERATING ON ONE OR TWO CAN BUSSES (30 OR 2X15 MESSAGE OBJECTS) ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION - ON-CHIP PLL. - DIRECT OR PRESCALED CLOCK INPUT.

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UP TO 143 GENERAL PURPOSE I/O LINES - INDIVIDUALLY PROGRAMMABLE AS INPUT, OUTPUT OR SPECIAL FUNCTION. - PROGRAMMABLE THRESHOLD (HYSTERESIS).

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IDLE AND POWER DOWN MODES MAXIMUM CPU FREQUENCY 40MHz PACKAGE PBGA 208 BALLS (23mm x 23mm x 1.96 mm - PITCH 1.27mm). SINGLE VOLTAGE SUPPLY: 5V 10% (EMBEDDED REGULATOR FOR 3.3 V CORE SUPPLY). TEMPERATURE RANGE: -40 +125 C
32 512K Byte Flash Memory CPU-Core and MAC Unit 16 16 2K Byte Internal RAM

16 16K Byte XRAM PEC 16

Watchdog Oscillator and PLL

P4.5 CAN1_RxD P4.6 CAN1_TxD P4.4 CAN2_RxD P4.7 CAN2_TxD

CAN1 Interrupt Controller CAN2 16

XT AL1 3.3V

XT AL2

V oltage Regulator

Port 4 Port 1 Port 0

GPT1

ASC usart

CAPCOM2

10-Bit ADC

PWM

16

External Bus Controller

CAPCOM1

SSC

16

Port 2 8

16

8

BRG Port 3 15

BRG Port 7 8 Port 8

Port 6 8

Port 5 16

P7.7 T rigger for ADC channel injection

XPORT10 16

XPORT9 16

XPWM 4

XTIMER XADCINJ

External connexion

March 2003
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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E-ST10F280 DATASHEET