E-STLC2500A| Datasheet

E-STLC2500A, E-STLC2500ATR, STLC2500A

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STLC2500A
BluetoothTM single chip
Data Brief

Features

Lowest power consumption Efficient support for WLAN coexistence in collocated scenario Auto calibration (VCO, Filters) No need for calibration of the RF part Total number of external components limited to 7 (6 decoupling capacitors and 1 filter) BluetoothTM specification compliance: V1.1 and V1.2 Ericsson Technology Licensing Baseband Core (EBC) Point-to-point, point-to-multi-point (up to 7 slaves) and scatternet capability Asynchronous Connection Oriented (ACL) logical transport link Synchronous Connection Oriented (SCO) link: 2 simultaneous SCO channels Supports Pitch-Period Error Concealment (PPEC) Adaptive Frequency Hopping (AFH): hopping kernel, channel assessment (master & slave) Faster connection: Interlaced scan for Page and Inquiry scan, first FHS without random back off, RSSI used to limit range Extended SCO (eSCO) links HW support for ACL, SCO and eSCO packet types (see ) Clock support for all cellular standards: system clock input and low power clock ARM7TDMI CPU with 32-bit core and AMBA (AHB-
APB) bus configuration Patch RAM capability Memory organization: on-chip RAM & ROM Communication interfaces: UART, PCM and I2C interfaces and 4 programmable GPIOs

Standard TFBGA84

Ciphering support up to 128 bits key Software support up to HCI stack H4 HCI Transport Layer HCI proprietary commands and single HCI command for patch/upgrade download Single power supply with internal regulators Supports 1.65 to 2.85 Volts IO systems Timer and watchdog Power class 2. Power class 1 compatible (with external power amplifier) Ultra low power architecture with 3 different low power modes: sleep , deep sleep, complete power down Dual Wake-up mechanism: initiated by the Host or by the Bluetooth device

Description
The STLC2500A is a single chip ROM-based Bluetooth solution implemented in 0.13 um ultra low power, low leakage CMOS technology for mobile terminal applications requiring integration up to HCI level. Patch RAM is available, enabling multiple patches/upgrades. The STLC2500A offers multiple interface options. The radio has been designed for single chip requirements and minimal power consumption.

February 2007

Rev 1

1/3
www.st.com
3

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