M48Z129V| Datasheet

M48Z129V, M48Z129V-85PM1

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M48Z129Y* M48Z129V
5.0V OR 3.3V, 1 Mbit (128 Kb x 8) ZEROPOWER SRAM
FEATURES SUMMARY

INTEGRATED, ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, AND BATTERY CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS OF DATA RETENTION IN THE ABSENCE OF POWER MICROPROCESSOR POWER-ON RESET (RESET VALID EVEN DURING BATTERY BACK-UP MODE) BATTERY LOW PIN - PROVIDES WARNING OF BATTERY END-OF-LIFE AUTOMATIC POWER-FAIL CHIP DESELECT AND WRITE PROTECTION WRITE PROTECT VOLTAGES (VPFD = Power-fail Deselect Voltage): M48Z129Y: VCC = 4.5 to 5.5V 4.2V VPFD 4.5V M48Z129V: VCC = 3.0 to 3.6V 2.7V VPFD 3.0V SELF-CONTAINED BATTERY IN THE CAPHATTM DIP PACKAGE PIN AND FUNCTION COMPATIBLE WITH JEDEC STANDARD 128K x 8 SRAMs

Figure 1. 32-pin PMDIP Module

32 1

PMDIP32 (PM) Module

* Contact local ST sales office for availability.
March 2005 1/16