M48Z2M1V| Datasheet

M48Z2M1V, M48Z2M1V-85PL1, M48Z2M1Y, M48Z2M1Y-70PL1

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M48Z2M1Y M48Z2M1V
5V or 3.3V, 16 Mbit (2Mb x 8) ZEROPOWER SRAM
FEATURES SUMMARY

INTEGRATED, ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, AND BATTERIES CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES 10 YEARS OF DATA RETENTION IN THE ABSENCE OF POWER AUTOMATIC POWER-FAIL CHIP DESELECT AND WRITE PROTECTION WRITE PROTECT VOLTAGES (VPFD = Power-fail Deselect Voltage): M48Z2M1Y: VCC = 4.5 to 5.5V 4.2V VPFD 4.5V M48Z2M1V: VCC = 3.0 to 3.6V 2.8V VPFD 3.0V BATTERIES ARE INTERNALLY ISOLATED UNTIL POWER IS APPLIED PIN AND FUNCTION COMPATIBLE WITH JEDEC STANDARD 2Mb x 8 SRAMs

Figure 1. 36-pin, DIP Module

36 1

PLDIP36 (PL) Module

March 2005

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