M48Z58| Datasheet

M48Z58, M48Z58-70PC1, M48Z58Y, M48Z58Y-70MH1E, M48Z58Y-70MH1F, M48Z58Y-70PC1

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M48Z58 M48Z58Y
5V, 64Kbit (8Kbit x 8) ZEROPOWER SRAM
Features

Integrated, ultra low power SRAM, power-fail control circuit, and battery READ cycle time equals WRITE cycle time Automatic power-fail chip deselect and WRITE protection WRITE protect voltages: (VPFD = Power-fail deselect voltage) M48Z58: VCC = 4.75 to 5.5V 4.5V VPFD 4.75V M48Z58Y: VCC = 4.5 to 5.5V 4.2V VPFD 4.5V Self-contained battery in the CAPHATTM DIP package Packaging includes a 28-lead SOIC and SNAPHAT top (to be ordered separately) SOIC package provides direct connection for a SNAPHAT top which contains the battery Pin and function compatible with JEDEC standard 8Kbit x 8 SRAMs RoHS compliant Lead-free second level interconnect
28 1 28 1

PCDIP28 (PC) Battery CAPHAT

SNAPHAT (SH) battery

SOH28 (MH)

November 2007

Rev 8

1/23
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