M50FW080| Datasheet

M50FW080, M50FW080K5G, M50FW080K5TG, M50FW080N5G, M50FW080N5TG, M50FW080NB5G, M50FW080NB5TG

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M50FW080
8-Mbit (1 Mb 8, Uniform Block) 3-V supply, Firmware Hub Flash memory
Feature summary

Supply voltage VCC = 3 V to 3.6 V for Program, Erase and Read operations VPP = 12 V for fast program and fast erase (optional) Two interfaces Firmware Hub (FWH) Interface for embedded operation with PC Chipsets Address/Address Multiplexed (A/A Mux) Interface for programming equipment compatibility Firmware hub (FWH) hardware interface mode 5 signal communication interface supporting Read and Write operations Hardware Write Protect pins for block protection Register-based Read and Write Protection 5 additional general-purpose inputs for platform design flexibility Synchronized with 33 MHz PCI clock Programming time 10 us typical Quadruple Byte Programming option 16 uniform 64 Kbyte memory blocks Program/Erase Controller Embedded Byte Program and Block/Chip Erase algorithms Status Register bits Program and Erase Suspend Read other Blocks during Program/Erase Suspend Program other Blocks during Erase Suspend For use in PC BIOS applications

PLCC32 (K)

TSOP32 (NB) 8 x 14mm

TSOP40 (N) 10 x 20mm

Electronic signature Manufacturer code: 20h Device Code: 2Dh Packages ECOPACK (RoHS compliant)

October 2006

Rev 10

1/56
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