M54HC11| Datasheet

M54HC11, M54HC11K, M54HC11K1

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M54HC11
RAD-HARD TRIPLE 3-INPUT AND GATE
s

s s

HIGH SPEED: tPD = 9ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 1uA(MAX.) at TA=25 C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 11 SPACE GRADE-1: ESA SCC QUALIFIED 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION DEVICE FULLY COMPLIANT WITH SCC-9201-107

DILC-14

FPC-14

ORDER CODES
PACKAGE DILC FPC FM M54HC11D M54HC11K EM M54HC11D1 M54HC11K1

The internal circuit is composed of 4 stages including buffer output, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

DESCRIPTION The M54HC11 is an high speed CMOS TRIPLE 3-INPUT AND GATE fabricated with silicon gate C2MOS technology.

PIN CONNECTION

March 2004

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