M54HC161| Datasheet

M54HC161, M54HC161D, M54HC161D1, M54HC161K, M54HC161K1

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M54HC161
RAD-HARD SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
s

s s

HIGH SPEED: fMAX = 62 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4uA(MAX.) at TA=25 C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 161 SPACE GRADE-1: ESA SCC QUALIFIED 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION DEVICE FULLY COMPLIANT WITH SCC-9204-059

DILC-16

FPC-16

ORDER CODES
PACKAGE DILC FPC FM M54HC161D M54HC161K EM M54HC161D1 M54HC161K1

DESCRIPTION The M54HC161 is an high speed CMOS SYNCHRONOUS 4-BIT BINARY PRESETTABLE COUNTER fabricated with silicon gate C2MOS technology.

The CLOCK input is active on the rising edge. Both LOAD and CLEAR inputs are active LOW. Presetting is synchronous on the rising edge of the clock, the function is cleared asynchronously. Two enable inputs (TE and PE) and CARRY output are provided to enable easy cascading of counters, which facilities easy implementation of N-bit counters without using external gates. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

PIN CONNECTION

March 2004

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