M54HC191| Datasheet

M54HC191, M54HC191D, M54HC191K, M54HC191K1

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M54HC191
RAD-HARD 4 BIT SYNCHRONOUS UP/DOWN COUNTERS
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HIGH SPEED: fMAX = 61 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4uA(MAX.) at TA=25 C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 191 SPACE GRADE-1: ESA SCC QUALIFIED 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION DEVICE FULLY COMPLIANT WITH SCC-9204-066

DILC-16

FPC-16

ORDER CODES
PACKAGE DILC FPC FM M54HC191D M54HC191K EM M54HC191D1 M54HC191K1

DESCRIPTION The M54HC191 is an high speed CMOS 4-BIT SYNCHRONOUS UP/DOWN COUNTER fabricated with silicon gate C2MOS technology. State changes of the counter are synchronous with the LOW-to-HIGH transition of the Clock Pulse Input. PIN CONNECTION

An asynchronous parallel load input overrides counting and loads the data present on the DATA inputs into the flip-flops, which makes it possible to use the circuits as programmable counters. A count enable input serves as the carry/borrow input in multi-stage counters. Control input, Down/ Up, determines whether a circuit counts up or down. A MAX/MIN output and a Ripple Clock output provide overflow/underflow indication and make possible a variety of methods for generating carry/borrow signals in multi-stage counter applications. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

March 2004

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