M54HC245| Datasheet

M54HC245, M54HC245D, M54HC245K, M54HC245K1

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M54HC245
RAD-HARD OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS (NON INVERTED)
s

s s

HIGH SPEED: tPD = 10ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4uA(MAX.) at TA=25 C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 245 SPACE GRADE-1: ESA SCC QUALIFIED 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION DEVICE FULLY COMPLIANT WITH SCC-9405-013

DILC-20

FPC-20

ORDER CODES
PACKAGE DILC FPC FM M54HC245D M54HC245K EM M54HC245D1 M54HC245K1

DESCRIPTION The M54HC245 is an advanced high-speed CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with silicon gate C2MOS technology. PIN CONNECTION

This IC is intended for two-way asynchronous communication between data buses, and the direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated. All inputs are equipped with protection circuits against static discharge and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW.

April 2004

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