M54HC30| Datasheet

M54HC30, M54HC30D, M54HC30K

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M54HC30
RAD-HARD 8-INPUT NAND GATE
s

s s

HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 1uA(MAX.) at TA=25 C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 30 SPACE GRADE-1: ESA SCC QUALIFIED 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION DEVICE FULLY COMPLIANT WITH SCC-9201-110

DILC-14

FPC-14

ORDER CODES
PACKAGE DILC FPC FM M54HC30D M54HC30K EM M54HC30D1 M54HC30K1

The internal circuit is composed of 5 stages including buffer output, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

DESCRIPTION The M54HC30 is an high speed CMOS 8-INPUT NAND GATE fabricated with silicon gate C2MOS technology.

PIN CONNECTION

April 2004

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