M74HC51| Datasheet

M74HC51, M74HC51B1R, M74HC51M1R, M74HC51RM13TR

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M74HC51
DUAL 2 WIDE 2 INPUT AND/OR INVERT GATE
s

HIGH SPEED: tPD = 11ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 1uA(MAX.) at TA=25 C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 51

DIP

SOP

TSSOP

ORDER CODES
PACKAGE DIP SOP TSSOP TUBE M74HC51B1R M74HC51M1R T&R M74HC51RM13TR M74HC51TTR

DESCRIPTION The M74HC51 is an high speed CMOS DUAL 2 WIDE 2 INPUT AND/OR INVERT GATE fabricated with silicon gate C2MOS technology. It contains a 2-WIDE 2-INPUT AND/OR INVERT GATE and a 2-WIDE 3-INPUT AND/OR INVERT GATE.

The internal circuit is composed of 3 stages (2 INPUT) or 5 stages (3 INPUT) including buffer output, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

August 2001

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