M74HC564| Datasheet

M74HC564, M74HC564B1R, M74HC564RM13TR

Datasheet preview, take a look at Datasheets before downloading (Data Sheet is available on manufacturer site)

M74HC564
OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT INVERTING
s

HIGH SPEED: fMAX = 90MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4uA(MAX.) at TA=25 C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 564

DIP

SOP

TSSOP

ORDER CODES
PACKAGE DIP SOP TSSOP TUBE M74HC564B1R M74HC564M1R T&R M74HC564RM13TR M74HC564TTR

DESCRIPTION The M74HC564 is an high speed CMOS OCTAL D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS INVERTING fabricated with silicon gate C2MOS technology. This 8 bit D-TYPE FLIP FLOP is controlled by a clock input (CK) and an output enable input (OE). On the positive transition of the clock, the Q outputs will be set to the logic state that were setup at the D inputs. While the OE input is at low level, the eight outputs will be in a normal logic state (high or low logic

level) and while high level the outputs will be in a high impedance state. The output control does not affect the internal operation of flip-flops; that is, the old data can be retained or the new data can be entered even while the outputs are off. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

August 2001

1/11