M74HCT374| Datasheet

M74HCT374, M74HCT374B1R, M74HCT374M1R, M74HCT374RM13TR

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M74HCT374
OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING
s

HIGH SPEED: fMAX = 50 MHz (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4uA(MAX.) at TA=25 C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) BALANCED PROPAGATION DELAYS: tPLH tPHL SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 374

DIP

SOP

TSSOP

ORDER CODES
PACKAGE DIP SOP TSSOP TUBE M74HCT374B1R M74HCT374M1R T&R M74HCT374RM13TR M74HCT374TTR

DESCRIPTION The M74HCT374 is an high speed CMOS OCTAL D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS NON INVERTING fabricated with silicon gate C2MOS technology. This 8 bit D-TYPE FLIP FLOP is controlled by a clock input (CK) and an output enable input (OE). On the positive transition of the clock, the Q outputs will be set to the logic state that were setup at the D inputs. While the OE input is at low level, the eight outputs will be in a normal logic state (high or low logic level) and while OE is at high level the outputs will be in a high impedance state.

The output control does not affect the internal operation of flip-flops; that is, the old data can be retained or the new data can be entered even while the outputs are off. The M74HCT374 is designed to directly interface HSC2MOS systems with TTL and NMOS components. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

July 2001

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