M74HCT640| Datasheet

M74HCT640, M74HCT640B1R, M74HCT640RM13TR

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M74HCT640
OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS (INVERTED)
s

HIGH SPEED: tPD = 13ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4uA(MAX.) at TA=25 C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 640

DIP

SOP

TSSOP

ORDER CODES
PACKAGE DIP SOP TSSOP TUBE M74HCT640B1R M74HCT640M1R T&R M74HCT640RM13TR M74HCT640TTR

DESCRIPTION The M74HCT640 is an advanced high-speed CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with silicon gate C2MOS technology. This IC is intended for two-way asynchronous communication between data buses, and the direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated.

All inputs are equipped with protection circuits against static discharge and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW.

PIN CONNECTION AND IEC LOGIC SYMBOLS

August 2001

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