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ST10F269-DPR| Datasheet

By datasheet - April 3rd, 2008

ST10F269-DPR, ST10F269D

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ST10F269
16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM
PRELIMINARY DATA

s

s

s

s

s s s s s

HIGH PERFORMANCE 40MHz CPU WITH DSP FUNCTION 16-BIT CPU WITH 4-STAGE PIPELINE 50ns INSTRUCTION CYCLE TIME AT 40MHz MAX CPU CLOCK MULTIPLY/ACCUMULATE UNIT (MAC) 16 x 16-BIT MULTIPLICATION, 40-BIT ACCUMULATOR REPEAT UNIT ENHANCED BOOLEAN BIT MANIPULATION FACILITIES ADDITIONAL INSTRUCTIONS TO SUPPORT HLL AND OPERATING SYSTEMS SINGLE-CYCLE CONTEXT SWITCHING SUPPORT MEMORY ORGANIZATION 256K BYTE ON-CHIP FLASH MEMORY SINGLE VOLTAGE WITH ERASE/PROGRAM CONTROLLER. 100K ERASING/PROGRAMMING CYCLES. UP TO 16M BYTE LINEAR ADDRESS SPACE FOR CODE AND DATA (5M BYTES WITH CAN) 2K BYTE ON-CHIP INTERNAL RAM (IRAM) 10K BYTE ON-CHIP EXTENSION RAM (XRAM) FAST AND FLEXIBLE BUS PROGRAMMABLE EXTERNAL BUS CHARACTERISTICS FOR DIFFERENT ADDRESS RANGES 8-BIT OR 16-BIT EXTERNAL DATA BUS MULTIPLEXED OR DEMULTIPLEXED EXTERNAL ADDRESS/DATA BUSES FIVE PROGRAMMABLE CHIP-SELECT SIGNALS HOLD-ACKNOWLEDGE BUS ARBITRATION SUPPORT INTERRUPT 8-CHANNEL PERIPHERAL EVENT CONTROLLER FOR SINGLE CYCLE INTERRUPT DRIVEN
DATA TRANSFER 16-PRIORITY-LEVEL INTERRUPT SYSTEM WITH 56 SOURCES, SAMPLING RATE DOWN TO 25ns TIMERS TWO MULTI-FUNCTIONAL GENERAL PURPOSE TIMER UNITS WITH 5 TIMERS TWO 16-CHANNEL CAPTURE / COMPARE UNITS A/D CONVERTER 16-CHANNEL 10-BIT 4.85us CONVERSION TIME AT 40MHz CPU CLOCK 4-CHANNEL PWM UNIT SERIAL CHANNELS SYNCHRONOUS / ASYNCHRONOUS SERIAL CHANNEL HIGH-SPEED SYNCHRONOUS CHANNEL

PQFP144 (28 x 28 mm) (Plastic Quad Flat Pack) ORDER CODE: ST10F269-Q3

s s s s s s

s s s s

TWO CAN 2.0B INTERFACES OPERATING ON ONE OR TWO CAN BUSSES (30 OR 2x15 MESSAGE OBJECTS) FAIL-SAFE PROTECTION PROGRAMMABLE WATCHDOG TIMER OSCILLATOR WATCHDOG ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION ON-CHIP PLL DIRECT OR PRESCALED CLOCK INPUT REAL TIME CLOCK UP TO 111 GENERAL PURPOSE I/O LINES INDIVIDUALLY PROGRAMMABLE AS INPUT, OUTPUT OR SPECIAL FUNCTION PROGRAMMABLE THRESHOLD (HYSTERESIS) IDLE AND POWER DOWN MODES SINGLE VOLTAGE SUPPLY: 5V 10% (EMBEDDED REGULATOR FOR 3.3 V CORE SUPPLY). TEMPERATURE RANGE: -40 +125 C 144-PIN PQFP PACKAGE

32 256K Byte Flash Memory CPU-Core and MAC Unit

16 16 2K Byte Internal RAM

16 10K Byte XRAM PEC

W atchdog Oscillator and PLL

CAN1_RXD CAN1_TXD CAN2_RXD CAN2_TXD

CAN1 Interrupt Controller CAN2

16

XT AL1 3.3V

XT AL2

Voltage Regulator

Port 4 Port 1 Port 0

GPT1

ASC usart

CAPCOM2

10-Bit ADC

PWM

16

External Bus Controller

CAPCOM1

SSC

GPT2

16

Port 2 8

16

BRG Port 3 15

BRG Port 7 8 Port 8

8

Port 6 8

Port 5 16

June 2002
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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