ST10F269Z1, ST10F269Z1Q3, ST10F269Z1Q6, ST10F269Z2, ST10F269Z2Q3, ST10F269Z2Q6, ST10F269Z2T3, ST10F269Z2T6

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ST10F269Zx
16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM
DATASHEET

Por t 4 Por t 1 Por t 0

ASC usar t

CAPCO M2

Ext er nal Bus Cont rolle r

10-Bit ADC

PWM

16 16 8

CAPCOM 1

SSC

HIGH PERFORMANCE 32 OR 40 MHZ CPU WITH DSP FUNCTION 16-bit CPU With 4-stage Pipeline 50ns (or 62.5ns) Instruction Cycle Time at 40MHz (or 32MHz) Max CPU Clock Multiply/accumulate Unit (Mac) 16 X 16-bit Multiplication, 40-bit Accumulator Repeat Unit Enhanced Boolean Bit Manipulation Facilities Additional Instructions to Support HLL and Operating Systems Single-cycle Context Switching Support MEMORY ORGANIZATION 128K or 256K Byte On-chip Flash Memory Single Voltage With Erase/program Controller Up to 1K Erasing/programming Cycles Up to 16 MByte Linear Address Space For Code And Data (5 MBytes With CAN) 2K Byte On-chip Internal RAM (IRAM) 10K Byte On-chip Extension RAM (XRAM) FAST AND FLEXIBLE BUS Programmable External Bus Characteristics for Different Address Ranges 8-bit or 16-bit External Data Bus Multiplexed or Demultiplexed External Address/data Buses Five Programmable Chip-select Signals Hold-acknowledge Bus Arbitration Support INTERRUPT 8-channel Peripheral Event Contr
oller for Single Cycle Interrupt Driven Data Transfer 16-priority-level Interrupt System with 56 Sources, Sampling Rate Down to 25ns at 40MHz (31.25ns at 32MHz) TIMERS Two Multi-functional General Purpose Timer Units with 5 Timers TWO 16-CHANNEL CAPTURE / COMPARE UNITS A/D CONVERTER 16-channel 10-bit 4.85us Conversion Time at 40MHz CPU Clock (6.06us at 32MHz) 4-CHANNEL PWM UNIT SERIAL CHANNELS Synchronous / Asynchronous Serial Channel High-speed Synchronous Channel

PQFP144 (28 x 28 mm) (Plastic Quad Flat Pack)

TQFP144 (20 x 20 x 1.40 mm) (Thin Quad Flat Pack) TWO CAN 2.0B INTERFACES OPERATING ON ONE OR TWO CAN BUSSES (30 OR 2x15 MESSAGE OBJECTS) FAIL-SAFE PROTECTION Programmable Watchdog Timer Oscillator Watchdog ON-CHIP BOOTSTRAP LOADER CLOCK GENERATION On-chip PLL Direct or Prescaled Clock Input REAL TIME CLOCK UP TO 111 GENERAL PURPOSE I/O LINES Individually Programmable as Input, Output or Special Function Programmable Threshold (Hysteresis) IDLE AND POWER DOWN MODES SINGLE VOLTAGE SUPPLY: 5V 10% (EMBEDDED REGULATOR FOR 2.7 or 3.3 V CORE SUPPLY). TEMPERATURE RANGES: -40 +125 C / -40 to 85 C 144-PIN PQFP/TQFP PACKAGES
128K or 256KByte Flash Memory 32 CPU-Core and MAC Unit 16 16 2K Byte Internal RAM Watchdog PEC Oscillator and PLL XTAL1 3.3V XTAL2

16 10K Byte XRAM

CAN1_RXD CAN1_TXD CAN2_RXD CAN2_TXD

CAN1 CAN2

Interrupt Controller

16

Voltage Regulator

G P T1

GPT2

Por t 2 8

16

BRG Port 3 15

BRG Port 7 8 Port 8

Port 6 8

Por t 5 16

September 2003

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ST10F269Z1 DATASHEET