STA2058| Datasheet

STA2058, STA2058EX

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STA2058
Teseo GPS Platform high-sensitivity baseband
Data Brief

Features

Single chip baseband with embedded flash Complete embedded memory system: FLASH 256K+16K bytes RAM 64K bytes 66-MHz ARM7TDMI 32 bit processor High Performance GPS engine (HPGPS) SBAS (WAAS and EGNOS) supported Sensitivity (-146dBm Acquisition, -159dBm Tracking) Time to first Fix (1s reacquisition, 2.5s Hot Start, 34s Warm Start, 39s Cold Start) Accuracy (2m Autonomous) External Memory Interface (EMI) supporting up to 64Mbite of external SRAM, FLASH and ROM Extensive GPS Receiver Interfaces: 48 GPIOs, 4 UARTs, 2 SPIs, 2 I2Cs, 2 CANs 2.0, 1 USB 1.1,1 HDLC and 4 channels ADC ST proprietary Flash embedded technology LFBGA144 and LQFP64 lead-free package -40 C to 85 C operating temperature range
LFBGA144 LQFP64

Description
STA2058 is the high-sensitivity baseband of Teseo GPS Platform which include the STA5620 RF Front-End. The embedded flash memory enables the equipment manufacturer to load the entire GPS software (including tracking, acquisition, navigation and data output) after customizing its interfaces to his needs. A standard GPS library is available from ST. Teseo is the ideal solution for consumer, Handheld, PND (Portable Navigation), in vehicle Navigation and Telematics systems. SBAS (WAAS and EGNOS) feature are also supported.

Evaluation kits

STA2058 module reference design (25x25mm) Evaluation board hosting STA2058 module SDK board (for application SW development)

Table 1.

Device summary
Device selection features Description GPS Baseband GPS Baseband Package LFBGA144 LQFP64 Body size GPIOs CAN 2 1 EMI Available Not available 10x10mm 10x10mm 48 32

Order codes STA2058EX STA2058

June 2007

Rev 2

1/20
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