STA264| Datasheet

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STA264
Sirius overlay decoder
Data Brief

Features

De-multiplexes the incoming overlay data stream from the G3 Baseband processor Maximal Ratio Combines the signals from the three streams of data (TDM1, TDM2, COFDM) Performs diversity combining two demodulated soft symbol streams Utilizes internal TDM demodulators for diversity combining cost sensitive applications Performs error correction on the overlay data Closes the processing loop to control the Diversity Combiner or accepts second L2 input for internal combining Presents data to external application processors Channels I2S data from Baseband to Application Processors Data can be uncompressed audio Data can be "Data" Receives SSPv2 Commands UART Parse data for Overlay and Legacy tune commands Navigation

TFBGA249

Controls the Baseband Processor and DSP via UART ports Required so theApplication Processor can interface to a single client Provides commands to the Application Processor Memory Interfaces SDR SDRAM to support the four second buffer and de-interleaving FLASH for the storage of Firmware

Description
The STA264 ASIC is a fully integrated processor for Sirius Satellite Digital Radio Service (SDARS) that allows for decoding of Layer 2 hierarchical data.

Table 1.

Device summary
Order code STA264 STA264TR Package TFBGA249 TFBGA249 Packing Tray Tape and reel

July 2007

Rev 2

1/6
www.st.com 6

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