STDVE003A| Datasheet

STDVE003A, STDVE003ABTR

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STDVE003A
3:1 TMDS / HDMI signal equalizer
Data Brief

Features

Compatible with HDMI v1.3 digital interface Conforms to the TMDS voltage standard on input and output channels 340 MHz maximum clock speed operation enabling up to 3.4 Gbps data rate per channel Integrated open-drain I2C buffer for DDC lines 5.3 V tolerant I2C I/O with 0 to 400 kHz frequency Ultra low capacitance of the channels Equalizer regenerates the incoming attenuated TMDS signal Buffer drives the TMDS outputs over long PCB track lengths Very low output skew and jitter Tight input thresholds reduce bit error rates On-chip 50 input termination Integrated fail-safe feature sets outputs to known state for un-driven inputs Available in TQFP80 package footprint with flow-through pin-out -40 C to 85 C operating temperature range Evaluation kit and samples are available
TQFP80

Description
The STDVE003A integrates a 4-channel 3.4 Gbps TMDS equalizer and a 3:1 switch to select one of the three HDMI ports. The three input HDMI ports can be either external ports or internal sources. High-speed data paths and flow-through pin-out minimize internal device jitter and simplify board layout. The equalizer overcomes ISI jitter effects from lossy cables. The buffer/driver on the output can drive the TMDS output signals over long distances. In addition to this, STDVE003A integrates the 50 termination resistor on all input channels to improve performance and reduce board space. The device can be put in a low-power mode by disabling the output current drivers. The STDVE003A is ideal for advanced HDTV applications demanding HDMI deep colour (16bit) superior image quality. The switch preserves the signal integrity to pass the stringent HDMI compliance requirements.

Table 1.

Device summary
Operating temperature -40 C to 85 C Package TQFP80 Packaging Tape and Reel

Order code STDEV003A

September 2007

Rev 1

1/3
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For further information contact your local STMicroelectronics sales office.