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STE2004S| Datasheet

By datasheet - April 3rd, 2008

STE2004S, STE2004SDIE2

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STE2004S
102 x 65 single-chip LCD controller/driver
Features

Description
The STE2004S is a low power CMOS LCD controller driver. Designed to drive a 65 rows by 102 columns graphic display, it provides all necessary functions in a single chip, including on-chip LCD supply and bias voltages generators, resulting in a minimum of externals components and in a very low power consumption. STE2004S features six standard interfaces (3-lines Serial, 3-lines SPI, 4-lines SPI, 68000 Parallel, 8080 parallel and I2C) for interfacing with the host micro-controller.

102 x 65 bits display data RAM Programmable MUX rate Programmable frame rate X,Y programmable carriage return Dual partial display mode Row by row scrolling N-line inversion Automatic data RAM blanking procedure Selectable input interface: I2C Bus Fast and Hs-mode (read and write) 8000 and 8080 Parallel Interfaces (read and write) 3-lines and 4-lines SPI Interface (read and write) 3-lines 9 bit Serial Interface (read and write) Fully integrated configurable LCD bias voltage generator with: Selectable multiplication factor (up to 5X) Effective sensing for high precision output Eight selectable temperature compensation coefficients CMOS compatible inputs Fully integrated oscillator requires no external components Designed for chip-on-glass (COG) applications. Low power consumption, suitable for battery operated systems Logic supply voltage range from 1.7 to 3.6V High voltage generator supply voltage range from 1.75 to 4.5V Display supply voltage range from 4.5 to 14.5V Backward compatibility with
STE2001/2/4

CO to C101

R0 to R64

OSC_IN OSC_OUT FR_IN FR_OUT

OSC MASTER SLAVE SYNC BIAS VOLTAGE GENERATOR

TIMING GENERATOR CLOCK

COLUMN DRIVERS

ROW DRIVERS

DATA LATCHES

SHIFT REGISTER

VSENSE SLAVE VLCD VLCDSENSE RES

HIGH VOLTAGE GENERATOR

RESET

65 x 102 RAM

SCROLL LOGIC TEST TEST_MODE TEST_VREF ICON_MODE EXT

VSSAUX VDD1,2 VSS DATA REGISTER INSTRUCTION REGISTER

DISPLAY CONTROL LOGIC

SEL 3

I2C BUS

9 Bit SERIAL

3 & 4 Line SPI

Parallel 8080

Parallel 68K

SEL 2 SEL 1

SA1 SAO SDOUT SCLK/SCL SDIN/SDA_IN SDA_OUT DB0 E/WR R/W- RD to DB7

D/C

CS
LR0047

January 2007

Rev 3

1/7979
www.st.com
79


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