STI7100, STi7100

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STi7100
Low cost HDTV set-top box decoder for H.264/AVC and MPEG-2
Data Brief

Features

The STi7100 is a single-chip, high-definition STB decoder including: ST40 CPU core, 266 MHz dual ST231 CPU cores for audio and video decoding, both 400 MHz transport filtering and descrambling video decoder: H.264/AVC and MPEG-2 graphics engine and dual display: high-definition (HD) and standard definition (SD) audio decoder

The STi7100 also features the following embedded interfaces: USB 2.0 DVI/HDMI output digital audio and video auxiliary input modem serial ATA

DDR SDRAM

5 x 2-ch S/PDIF PCM out AudioL 2-ch PCM in AudioR Audio DACs Audio decoder and interfaces ST231 core

SD video in

Peripheral I/O and external interrupts

32 ST40 core 266 MHz UDI MMU 16 K Icache Int. control 32 K Dcache

32

Video LMI System LMI

Serial ATA interface Digital video input STBus USB 2.0

2x I/F SmCard 6x GPIO

IR Tx/Rx ILC

MAFE interface 4x UARTs

PWM 3x SSCs

PDES

CP FDMA DAA Clock generator and system services DiSEqC

Video decoder H.264/AVC, MPEG2 ST231 core

2D gamma blitter

CUR GDP GDP Display compositor

LMU Main video display Aux video display EMI

PTI TSmerger/router

DVI-HDCP HDMI

Output stage DACs

DENC DACs

TSIN0 TSIN1 TS I/O NRSS-A

TMDS main video output (HD)

Main video output (HD) YPbPr

Aux video output (SD) YC/CVBS

Flash peripherals

December 2006

Rev 2

1/9
www.st.com 9

For further information contact your local STMicroelectronics sales office.

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STI7100 DATASHEET