STP5NB100| Datasheet

STP5NB100, STP5NB100FP

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STP5NB100 STP5NB100FP
N-CHANNEL 1000V - 2.4 - 5A TO-220/TO-220FP PowerMeshTM MOSFET
TYPE STP5NB100 STP5NB100FP
n n n n n

VDSS 1000 V 1000 V

RDS(on) < 2.7 < 2.7

ID 5A 5A

TYPICAL RDS(on) = 2.4 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED TO-220

3 1 2
1 2

DESCRIPTION Using the latest high voltage MESH OVERLAYTM process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company's proprieraty edge termination structure, gives the lowest R DS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. APPLICATIONS n HIGH CURRENT, HIGH SPEED SWITCHING n SWITH MODE POWER SUPPLIES (SMPS) n DC-AC CONVERTERS FOE WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM (l) PTOT dv/dt (1) VISO Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25 C Drain Current (continuos) at TC = 100 C Drain Current (pulsed) Total Dissipation at TC = 25 C Derating Factor Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Storage Temperature Max. Operating Junction Temperature

TO-220FP

INTERNAL SCHEMATIC DIAGRAM

Value STP5NB100 STP5NB100FP 1000 1000 30 5 3.1 15.2 135 1.08 4.5 65 to 150 150
(*)Limited only by maximum temperature allowed (1)ISD 4.7A, di/dt 200A/us, VDD V (BR)DSS, Tj T JMAX.

Unit V V V 5 (*) 3.1 (*) 15.2 (*) 40 0.32 4.5 2500 A A A W W/ C V/ns V C C

( )Pulse width limited by safe operating area

May 2002

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