STS9NF3LL| Datasheet

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N-CHANNEL 30V - 0.016 - 9A SO-8 LOW GATE CHARGE STripFETTM II POWER MOSFET
TYPE STS9NF3LL
s s s s

STS9NF3LL

VDSS 30 V

RDS(on) <0.019

ID 9A

TYPICAL RDS(on) = 0.016 OPTIMAL RDS(on) x Qg TRADE-OFF @ 4.5V CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED

DESCRIPTION
This application specific Power MOSFET is the second generation of STMicroelectronis unique "Single Feature SizeTM" strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance.

SO-8

INTERNAL SCHEMATIC DIAGRAM

APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS FOR MOBILE PCS

ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM( ) Ptot Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25 C Drain Current (continuos) at TC = 100 C Drain Current (pulsed) Total Dissipation at TC = 25 C Value 30 30 16 9 5.6 36 2.5 Unit V V V A A A W

( ) Pulse width limited by safe operating area. November 2001
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